The present invention relates generally to the plasma processing of semiconductor wafers and, more specifically, to a low-energy ion generation and transport mechanism for use in plasma ashing systems.
In the manufacture of integrated circuits, photolithography techniques are used to form integrated circuit patterns on a substrate. Typically, a semiconductor substrate is coated with a photoresist material, portions of which are exposed to ultraviolet (UV) radiation through a mask to image a desired circuit pattern on the photoresist. The portions of the photoresist left unexposed to the UV radiation are removed by a processing solution, leaving only the exposed portions on the substrate. In certain instances, these remaining exposed portions are baked using UV light during a photostabilization process to enable the photoresist to withstand subsequent processing.
After such processing, in which the integrated circuit components are formed, it is generally necessary to remove the remaining photoresist from the wafer. In addition, residue that may have been introduced on the substrate surface through processes such as etching must be removed. Typically, the photoresist is xe2x80x9cashedxe2x80x9d or xe2x80x9cburnedxe2x80x9d in the presence of atomic oxygen and other gases, and the ashed or burned photoresist, along with the residue, is xe2x80x9cstrippedxe2x80x9d or xe2x80x9ccleanedxe2x80x9d from the surface of the substrate.
One manner of removing photoresist and residues is by directing a radio frequency (RF) energized or microwave-energized plasma at the substrate surface. In the case of a microwave-energized plasma, the plasma is formed by a gas mixture that is transported through a plasma tube that passes through a resonant microwave cavity. Microwave energy within the cavity is introduced into the plasma tube to excite the gas mixture therein and form a plasma. The exited plasma exhaust containing reactive species passes from the tube into a process chamber, in which resides a photoresist-coated semiconductor substrate to be ashed. This type of asher is known as a xe2x80x9cdownstream asherxe2x80x9d, where the resist coated substrate is physically removed from the plasma generator, which is known as an xe2x80x9cupstreamxe2x80x9d plasma source.
In semiconductor applications where a relatively high dose of ion implantation has been imparted to a resist-coated wafer (e.g., xe2x89xa71xc3x971015 cmxe2x88x922), the top layer of the photoresist turns into a highly carbonized crust which becomes impervious to the diffusion of trapped solvents from the remaining resist below. As a result, this crust must be carefully removed by the asher (generally at low wafer temperatures) in order to prevent the solvents from explosively exiting the crust. Otherwise, such a condition leads to the creation of xe2x80x9cpoppersxe2x80x9d on the photoresist. The residue often left on the wafer surface by poppers is difficult to remove, and may be a potential source of contaminating particles on the wafer and within the tool chamber. A low temperature process relying solely upon the atomic species to chemically remove the crust, however, is inherently inefficient and compromises the asher""s throughput (as measured by number of wafers processed per unit time).
A known method for enhancing the ash rate of the carbonized crust at low temperatures employs the use of ion bombardment. A conventional ion source in an asher uses a platen (or electrostatic chuck), which is typically biased at radio frequency (RF) by an RF source. Once activated, the RF source creates a capacitive discharge above the wafer. This secondary discharge then creates ion-electron pairs immediately above the wafer, from which ions are then accelerated by a capacitive xe2x80x9csheathxe2x80x9d created above the wafer surface. Because the capacitive sheath may have an electric field potential as high as 40-50 eV or higher, the ions may strike the wafer at these high energies. However, such high-energy ion bombardment can cause extensive damage to the devices formed on the wafers. Also, the extensive heating of the wafer due to the heavy ion bombardment may lead to inconsistent wafer temperatures between wafer to wafer operations.
The previously discussed drawbacks and deficiencies of the prior art are overcome or alleviated by a method for creating and transporting low-energy ions for use in plasma processing of a semiconductor wafer. In an exemplary embodiment of the invention, the method includes generating plasma from a gas species to produce a plasma exhaust. The plasma exhaust is then introduced into a processing chamber containing the wafer. The ion content of the plasma exhaust is enhanced by activating a supplemental ion source as the plasma is introduced into the processing chamber, thereby creating a primary plasma discharge therein. Then, the primary plasma discharge is directed into a baffle plate assembly, where a secondary plasma discharge is created as the plasma exits the baffle plate assembly. The strength of the sheath potential exerted on ions contained in the secondary plasma discharge is reduced, the sheath potential resulting from the primary plasma discharge. The resulting reduced strength of the electric field accelerates the ions through a lower potential, thereby causing ion bombardment on the wafer at an energy insufficient to cause damage to semiconductor devices formed on the wafer.
In a preferred embodiment, the reduction of acceleration of ions through the sheath potential in the secondary plasma discharge is achieved by locating the supplemental ion source so as to have the baffle plate assembly disposed between the primary plasma discharge and the wafer. In addition, the baffle plate assembly is configured so as to cause the secondary plasma discharge to be shaped in substantially a micro-jet formation. The baffle plate assembly includes an upper baffle plate and a lower baffle plate, with said lower baffle plate further having a plurality of chamfered holes located therethrough, to provide uniform ion impingement on the surface of the wafer, thereby preventing charging effects from damaging the wafer.